BMEN90033 · Week 10
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BMEN90033 · WEEK 10 · PASSIVE PEAK DETECTION

Peak detection with passive components.

Overview

A peak detector is a circuit whose output equals the maximum value attained by its input over some interval of observation. This chapter constructs three implementations using only diodes, capacitors, resistors, and switching transistors. Each variant is analysed under sinusoidal and pulse-train inputs, and the operating regimes in which the output ceases to represent the true peak are identified. Active peak detectors based on operational amplifiers are deferred to a later chapter.

diode capacitor envelope RC discharge transistor reset
01the diode-capacitor circuit

Charging a capacitor through a diode.

Consider a diode placed in series with a capacitor whose far terminal is grounded. The output is taken at the node between the diode cathode and the capacitor. When the input voltage exceeds the capacitor voltage by more than the diode forward drop $V_F$, the diode is forward-biased and the capacitor charges toward $V_\mathrm{in} - V_F$. When the input falls below this value, the diode becomes reverse-biased and isolates the capacitor from the source. In the absence of any other discharge path, the capacitor retains the largest value to which it has been charged.

The output is therefore equal to the running maximum of $V_\mathrm{in} - V_F$ since the last reset of the capacitor. For a silicon junction diode, $V_F$ lies between approximately $0.6\,\mathrm{V}$ and $0.7\,\mathrm{V}$; a Schottky diode reduces this value to between $0.2\,\mathrm{V}$ and $0.3\,\mathrm{V}$. Two consequences follow immediately. First, the output is offset below the true peak by a constant $V_F$. Second, any input excursion smaller than $V_F$ does not forward-bias the diode and is therefore not registered.

The interactive panel demonstrates these properties. As the amplitude $A$ is varied, the held output settles at $A - V_F$ provided $A > V_F$. For $A \le V_F$, the output remains at zero indefinitely.

The held voltage does not decay in the idealised analysis. Real capacitors exhibit finite leakage, and a reverse-biased diode passes a small reverse-saturation current. The output therefore droops slowly in practice even when no deliberate discharge path is provided. Section 02 introduces such a path, so that the detector can follow a slowly varying envelope rather than holding the all-time maximum.
amplitude 1.60 V VF 0.70 V reset
circuit · diode and capacitor
input and output · vin(t), vout(t)
peak vin1.60 V
vout (held)0.90 V
drop VF0.70 V
statusconducting
02the rc envelope detector

Adding a discharge path with a parallel resistor.

Place a resistor $R$ in parallel with the storage capacitor. Between conduction intervals of the diode, the capacitor discharges exponentially through $R$ with time constant $\tau = RC$. The resulting circuit is known as an envelope detector: it follows the slowly varying amplitude (the envelope) of an amplitude-modulated input, rather than holding the all-time peak.

The choice of $\tau$ involves a fundamental compromise. If $\tau$ is much shorter than the carrier period, the capacitor discharges substantially within a single carrier cycle and the output exhibits ripple at the carrier frequency. If $\tau$ is much longer than the timescale of the modulation, the capacitor cannot discharge fast enough to follow a decreasing envelope and a lag develops between the true envelope and the detector output. The standard design criterion is

$$ \tfrac{1}{f_\mathrm{in}} \;\ll\; \tau \;\ll\; \tfrac{1}{f_\mathrm{env}}, $$

where $f_\mathrm{in}$ denotes the carrier frequency and $f_\mathrm{env}$ the highest frequency component of the envelope. When the carrier spectrum and the envelope spectrum overlap, the two inequalities cannot be simultaneously satisfied, and faithful envelope recovery with a single passive RC stage is not possible.

The interactive panel allows $\tau$, the carrier frequency and the envelope frequency to be varied independently. For small $\tau$, the output exhibits ripple synchronous with the carrier. For large $\tau$, the output lags the true envelope, particularly during its falling portions.

The diode forward drop $V_F$ continues to offset the output below the true peak. When $V_F$ is comparable to the smallest peak value of interest, this offset is no longer a small constant correction. The diode then turns on progressively later in each cycle, and the captured value departs nonlinearly from the true peak amplitude.
τ = RC 120 ms fcarrier 12 Hz fenv 1.0 Hz
circuit · diode, capacitor, bleed resistor
input and output · vin(t), vout(t)
τ / Tcarrier1.4
ripple0.18 V
envelope laglow
03switched discharge with a transistor

Replacing the resistor with a controlled switch.

A continuous bleed resistor enforces an exponential discharge whose time constant is fixed by the choice of $R$. In many measurement contexts, a different behaviour is required: the peak is to be held over a defined acquisition window, the capacitor reset to zero at the end of the window, and a new window started. This behaviour is obtained by replacing the discharge resistor with a transistor switch that connects the capacitor to ground only when commanded by an external logic signal.

A common implementation uses an n-channel enhancement-mode MOSFET with its drain at the capacitor node, its source at ground, and its gate driven by a logic-level reset signal $\phi_\mathrm{rst}$. While $\phi_\mathrm{rst}$ is low, the MOSFET is off and presents a high impedance, so the capacitor holds its charge. When $\phi_\mathrm{rst}$ is high, the MOSFET enters its triode region and discharges the capacitor through its on-resistance $R_\mathrm{on}$ with time constant $R_\mathrm{on} C$. A bipolar transistor driven into saturation through a base resistor performs the same function. The choice between MOSFET and BJT affects the on-resistance, the off-state leakage, and the gate or base drive requirements; the operating principle is identical.

The output is therefore piecewise. During each acquisition window, the output rises monotonically and captures the running maximum within that window. At the end of the window, the reset pulse forces the output to zero before the next window begins. The detector reports the largest value of $V_\mathrm{in} - V_F$ encountered in the most recent window, rather than tracking a continuous envelope.

The discharge path is independent of the input source. The reset time constant is fixed by $R_\mathrm{on}$ and $C$, while the charging time constant is fixed by the source impedance and $C$. The two timescales are decoupled, which is the principal advantage over the bleed-resistor variant in which a single $\tau$ governs both.
window 240 ms reset width 10 ms fcarrier 20 Hz
circuit · diode, capacitor, MOSFET reset
input and output · vin(t), vout(t)
reset signal · φrst(t)
window240 ms
peak captured0.00 V
switchoff
04limitations and failure modes

Failure modes of passive peak detection.

Each of the three passive detectors developed above has specific operating regimes in which its output ceases to represent the true peak of the input. To exhibit these regimes simultaneously, a test waveform is constructed that combines three features encountered in biopotential measurement: a slow baseline drift, a sequence of small spikes whose amplitude is comparable to the diode forward drop $V_F$, and a subsequent sequence of larger spikes whose envelope rises and then decays. The same waveform is processed by all three detectors and the outputs are overlaid for direct comparison.

Loss of small-signal spikes due to the diode drop

Both the diode-capacitor detector and the RC envelope detector require the input to exceed $V_F$ before any charge transfer to the capacitor occurs. A typical electroencephalographic spike measured at the scalp has an amplitude of order $50\,\mathrm{\mu V}$. Direct application of a passive peak detector at this amplitude produces no output. Recovery of the spike requires a preamplifier of gain at least $10^4$ to be placed ahead of the detector. No choice of capacitor or resistor restores the lost information; the loss is set by the diode physics.

Latching of the diode-capacitor detector

The diode-capacitor circuit has no discharge path and therefore captures the supremum of $V_\mathrm{in} - V_F$ over all past time. Once the input has approached its all-time maximum, the output ceases to convey new information. If the quantity of clinical interest is the time-evolution of the spike amplitude rather than its all-time maximum, this circuit is unsuitable.

Trade-off between ripple and envelope lag

The envelope detector is governed by a single time constant. With $\tau$ chosen short enough to avoid envelope lag, the output exhibits ripple at the carrier frequency. With $\tau$ chosen long enough to suppress this ripple, the output lags any decrease in the envelope. When the carrier and envelope timescales are not well separated, both errors are present simultaneously and cannot be removed by any choice of $\tau$.

Dependence on an external clock

The transistor-reset detector is the most accurate of the three variants, but it is no longer purely passive: a logic-level clock and a gate (or base) driver must be supplied. The choice of window length is itself a design parameter. A window shorter than the duration of a single spike causes the spike to be split between two consecutive windows and reported as two smaller peaks. A window much longer than the inter-spike interval averages the amplitudes of consecutive spikes into a single output value.

Each of the failure modes described above is removed in the active, op-amp-based peak detector treated in a later chapter. The operational amplifier eliminates the diode drop from the signal path by enclosing the diode within a feedback loop, and provides a low-impedance output that does not load the storage capacitor. The remaining design parameters are then the value of the storage capacitor and the chosen reset mechanism.
spike size 0.45 V VF 0.55 V τ (RC) 400 ms
input · vin(t) with small early spikes and a decaying spike train
three passive detectors · simple, RC, transistor-reset
small spikes seen0 / 4
simple detectorlatched
RC trackinglags
1 / 5